DSPCARD FPGA/DSP/USB board
DSPCARD: a high speed digital signal processing board
PCB picture
Top side photo
Bottom side photo
Bare board scan
PCB artwork (PDF)
About
DSPCARD was designed for high speed digital signal processing and software defined radio. Schematics are available for download under the GPL. The PCB layout will not be released due to the time and expense of prototype production.


Features
Analog Devices Blackfin 532 DSP
  • 400MHz
  • 32MB SDRAM (up to 128MB with 1Gb parts)
  • 1MB flash - can be expanded with SPI flash
  • USB 2.0 device using NET2272
  • 2 SPORTS (Synchronous serial compatible with many audio ADCs and DACs)
  • SPI with 7 chip selects available
  • UART
Xilinx Spartan III FPGA
  • XC3S400 or XC3S1000
  • FT256 BGA package for excellent signal integrity
  • 32MB SDR SDRAM 16 bits wide
  • Configured by DSP (slave serial)
  • 80 IO to header
  • 60MHz 8 bit PPI link to DSP
  • SPI to DSP
  • 1.2V SMPS using LM3475 - optional external 1.2V supply
  • 2.5V LDO onboard
General:
  • 80x55mm 4 layer PCB with parts on both sides
  • 3.3VDC power input
  • 2 80 pin Hirose DF17 connectors for expansion
Software:
  • DSPCARD should be able to run uCLinux or RTEMS, but I do not support these (or any software for that matter)
  • A small RTOS is currently being developed for DSPCARD. This should allow for the entire kernel to reside in instruction SRAM. This will enable faster operation than uCLinux in SDRAM.

Software used for schematics, board layout:
All licensed under the GPL
Schematics: gEDA gschem
PCB Layout PCB


Downloads
WARNING: preliminary and untested schematics.  These may change at any time.

PDF version of schematic dspcard.pdf
gschem files - dspcard.tar.gz


Progress
6/16/2005 Ordered pcb from ProtoExpress, waiting on parts
6/26/2005 Recieved board, still waiting for FPGA, more flux, LM3475
7/11/2005 Recieved dspdev development and programming board from Advanced Circuits. All parts except the FPGA have arrived.
7/12/2005 Installed DSP, ran first program, a simple LED flasher written in assembly
7/19/2005 FPGA BGA soldering successful More information
7/20/2005 FPGA bitstream loader written, tested with DAC on dspdev at 80MHz
8/10/2005 USB working at both full and high speed, RTOS getting closer to being finished

Errata:
None yet. Let me know if you find anything wrong.

Copyright Info:
All schematics and software are released under the GNU GPL. See the COPYING file included with the source for more information. I do not guarantee the design of the hardware or software to be free of flaws. You are responsible for ensuring that it is suitable for your application. If you would be interested in using this design under a different license, please contact me for more information.

Related:



Last updated 8/10/2005
If you have any comments or questions feel free to send me an email.
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website@dlharmon.com

West Labs